ATE·IQ reads your IG-XL workbook, your spec, your existing board exports and your STDF lots — then writes test code grounded in a typed 287-entry knowledge base, validated by 50+ rules, and IG-Link compiled before it reaches your reviewer. Local-first. Single Windows installer. Sales-led.
Public Sub tfVDDPLL_Cont()
TheHdw.DCVI.Pins("DUT_VDDPLL").Voltage = 1.8
TheHdw.Wait 0.000025
Dim lPld As New PinListData
lPld = TheHdw.DCVI.Pins("DUT_VDDPLL").Meter.Read(tlStrobe)
Call igxlutils.Limits.TestLimit(MeasValues:=lPld, TestNumber:=100)
End SubEvery number below is grounded against a real working IG-XL programme — 23 sheets, 37 VBA modules, 788 instrument call sites. Not a synthetic benchmark.
An ATE programme runs on a tester. A wrong line costs a week of yield. ATE·IQ is built around the assumption that AI output must be reviewable end-to-end before it goes near silicon.
Reuse a prior design? The pilot emits a <cite kind="design"/> chip that links to /pcb/<id>. Quote a spec? <cite kind="spec"/> deep-links to the requirement line. Reference a part? <cite kind="part"/> points at the parts library. No claim without a citation.
Cross-sheet validator runs between the LLM output and the IG-Link compile step. Arg-ceiling, opcode allowlist, Flow → TestInst / Limits / Binning resolution, sheet-ref resolution, Tdelay sanity, tf* procedure-prefix convention. Failures land in the Validation tab of the run viewer.
287 VBT-API entries, every one citing its UltraFLEX documentation page. 14 instruments detected on the reference. Eight idiom-derived best-practices. The pilot doesn't pattern-match a public-internet LLM — it reasons against this typed surface.
Every generation produces a run with status (curate → draft → compile → verify), artefacts grouped by kind, a Validation tab with failures and warnings collapsible by rule, and one-click download. No JSON spelunking. No "check the logs".
Every surface reads from the same project context. No silos.
The Excel task pane and the standalone IDE are two surfaces on the same engine — chat with your open workbook from inside Excel, then review the same run in the IDE without re-uploading anything.
An AI co-engineer that sees your project context — workbook + repo + spec + PCB designs + STDF lots — and writes IG-XL VBA or circuit-json with every reference cited. Reasoning collapsibles, citation chips for designs / specs / parts, reuse-aware delta blocks.
Bring your existing boards: Specctra DSN (KiCad · Allegro · EAGLE dialects), IPC-2581 — validated against a real Allegro board — and multi-page PDF schematics, all landing as canonical circuit-json. Reference parts library the LLM consults (no hallucinated pinouts). Pilot emits circuit-json directly, with reuse-aware delta blocks.
Native STDF V4 binary parser (no Python at runtime). Yield-by-site, first-fail pareto, test-time pareto, wafer-map clusters, limits-vs-spec drift with relax-candidate flagging. Seven tools the pilot calls in-chat to query any test, any lot, any cross-lot trend.
Typed knowledge base — 287 VBT-API entries, 14 instruments detected on real programmes, prohibitions + settle-time envelopes per family. 30+ VBA quality rules. 20+ cross-sheet rules. Spec ingestion (Jama Connect + PDF). IG-Link compile in the pipeline.
All MCP servers and the Next.js shell bind 127.0.0.1. Nothing reachable from the LAN, nothing reachable from the corp VPN.
Anthropic, OpenAI-compatible, or Azure OpenAI. Your keys, your provider, your egress policy. Switchable at runtime from the Settings panel.
Workbook, VBA, schematics, STDF lots — none of it leaves the host. Only the prompt does, and you decide where that goes.
Cold from a spec + your team's test-program repo, or warm from an existing test program you want to extend — .igxl recommended, .xlsm also supported. Scoping call is 30 minutes. Quote follows within one business day.