Pattern generator

Declare an SPI or I²C bus and the transactions you need, and get IG-XL digital patterns, the same pattern in standard interchange and waveform-viewer formats, and a waveform with every cycle labelled. Open a pattern ATE·IQ™ generated, or paste your Time Sets sheet, and the same viewer shows what drives, what compares and when.

Pattern Generator waveform of an example write then read: clock, data in, data out and chip select lanes, with compare strobes on the read
An example write-then-read transaction with generic pin names: clock, data in, data out and chip select, with compare strobes on the read.

Patterns from the protocol, in four formats

SPI in all four clock modes, MSB or LSB first, with chip-select framing and compares on the return data; I²C with START and STOP framing, 7- and 10-bit addressing, compares on the slave's ACK and the master's NACK. The output is a cyclized IG-XL pattern, plus the same vectors as STIL, WGL and VCD for interchange and waveform viewers.

Suites from the register map

With a register map on the project (detected from a table, or imported from a CMSIS-SVD file), the generator writes whole suites: a walking read/write on every writable bit of each read-write register, with reserved and read-only bits masked; a read-only protection suite that writes the inverted reset value and expects the register unchanged; and a reset-value suite. Save the bus setup back to the project as a named profile and it is there the next time.

The waveform is the pattern

The waveform you inspect and the files you download are written from the same vectors, so the preview cannot drift from the output. Phase bands carry bit labels, transaction boundaries are marked, and compares are drawn where they strobe. Open a pattern ATE·IQ generated, or paste your Time Sets sheet, and the viewer rebuilds the waveform from the pattern's own cycle labels.

Boundaries The generator's checks run offline and prove the pattern is internally consistent. Compiling needs a configured IG-XL pattern compiler; without one the step reports blocked rather than passing. The viewer reads patterns in the form ATE·IQ's generator writes.